Flash memory is an electronic non-volatile computer storage medium that can be electrically erased and reprogrammed. One type of flash memory, a Negated AND or NOT AND (NAND), allows information stored on portions of the NAND to be rewritten rather than requiring the entire memory to be erase before information can be rewritten. Accordingly, the NAND flash memory is widely used in electronic devices. For example, NAND flash memory is used in the main memory of electronic devices, in memory cards, Universal Serial Bus (USB) flash drives and solid-state drives.
The NAND flash memory is organized into blocks, each of which includes a number of pages. A few bytes in each page may be used to store an error correction code (ECC) checksum. The memory cells are coupled together in series from top to bottom (i.e., in a column) to form a bit line and from left to right (i.e., in a row) to form a word line. Reading and programming portions of the NAND flash memory may be performed on a page basis and erasure may only be performed on a block basis. A control gate in each memory cell is used to control the reading, programming and erasing of the cell by applying different control voltages. When a page is being read, four voltage levels are applied to the block which includes the page that is being read. A voltage level is applied to the top portion of each bit line in the block, a voltage level applied to the bottom of each bit line, a voltage level is applied to the control gates of all cells in the pages in the block that are not being read, and a voltage level is applied to the control gates of cells in the page that is being read.
Cells in pages in a block that are not being read may become stress cells. Consider for example that a block has 1-N pages. When cells on a second page are being read, due to the way voltages are applied to the other pages, cells on those pages may receive elevated voltage and become stress cells (i.e. the cell appears to be weakly programmed). Stress cells may be vulnerable to a read disturb error. A read disturb error is a condition that occurs when a given area of memory is read excessively, causing the data in that area of the memory to be changed from its original values and thus altering the contents of, for example, applications, operating systems or data, stored in that area of the memory. This is not a permanent condition and when detected early, the read disturb error may be corrected by re-writing the contents of the affected areas with read disturb error(s) to another area in the memory.
The NAND flash memory uses the ECC to correct bits in the memory that fail during normal device operations. When an ECC feature is enabled, the ECC is generated internally when a page is written to a memory core. Thereafter, when the page is read to a cache register, the ECC is calculated again and compared with the ECC value stored in the memory core and bit errors are corrected, if necessary. A device accessing the NAND flash memory either outputs the corrected data or returns an ECC status. However, there is limit on the number of bit errors within a page that the ECC can be used to correct. For example, in one device, the ECC may be used to correct up to four bit errors within a page. Hence, as the read count of a block increases, more read disturb error bits may appear in the block, wherein the number of read disturb error bits could eventually exceed the error correction capability of the ECC. When the error correction capability of the ECC is exceeded, the information in a block may become corrupted, and could potentially become unreadable or unreliable before the read disturb error is corrected. Given the wide use of the NAND flash memory, it is desirable to detect and correct read disturb errors before such errors lead to failure of the NAND flash memory.
Accordingly, there is a need for apparatus and method for detecting and correcting read disturb errors on a flash memory.
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The apparatus and method components have been represented where appropriate by conventional symbols in the drawings, showing only those specific details that are pertinent to understanding the embodiments of the present invention so as not to obscure the disclosure with details that will be readily apparent to those of ordinary skill in the art having the benefit of the description herein.